1 UT54ACS138E 3-line to 8-line decoders/demultiplexers july, 2013 datasheet www.aeroflex.com/logic features ? 0.6 ?? m ? crh cmos process - latchup immune ? high speed ? low power consumption ? wide power supply operating range of 3.0v to 5.5v ? available qml q or v processes ? 16-pin flatpack ? UT54ACS138E - smd - 5962-96544 description the UT54ACS138E is a 3-line to 8-line decoder/demultiplexer designed to be used in high-performance memory-decoding or data-routing applications requiring very short propagation delay times. the conditions at the binary select inputs and the three enable inputs select one of eight output lines. two active-low and one active-high enable inputs reduce th e need for external gates of inverters when expanding. a 24-line decoder can be implement- ed without external inverters a nd a 32-line decoder requires only one inverter. an enable input can be used as a data input for demultiplexing applications. the device is characterized over full military temperature range of -55 ? c to +125 ? c. function table pinout 16-lead flatpack top view 1 2 3 4 5 7 6 16 15 14 13 12 10 11 89 b c g2a g2b g1 y7 v ss a v dd y0 y1 y2 y3 y4 y5 y6 enable inputs select inputs output g1 g2a g2b c b a y0 y1 y2 y3 y4 y5 y6 y7 x x h x x x h h h h h h h h l x x x x x h h h h h h h h x h x x x x h h h h h h h h h l l l l l l h h h h h h h h l l l l h h l h h h h h h h l l l h l h h l h h h h h h l l l h h h h h l h h h h h l l h l l h h h h l h h h h l l h l h h h h h h l h h h l l h h l h h h h h h l h h l l h h h h h h h h h h l
2 logic symbol logic diagram (7) y7 (1) a (2) b (3) c (6) g1 (4) g2a (5) g2b 2 4 1 (9) y6 (10) y5 (11) y4 (12) y3 (13) y2 (14) y1 (15) y0 bin/oct en & 1 2 0 4 5 3 6 7 (7) y7 (1) a (2) b (3) c (6) g1 (4) g2a (5) g2b 2 4 1 (9) y6 (10) y5 (11) y4 (12) y3 (13) y2 (14) y1 (15) y0 dmux en & 1 2 0 4 5 3 6 7 g 0 7 --- note: 1. logic symbols in accordance with an si/ieee standard 91-1984 and iec publication 617-12. y0 y1 y2 y3 y4 y5 y6 y7 data select enable (15) (14) (13) (12) (11) (10) (9) (7) (3) (2) (1) a b c (6) (4) (5) g1 g2a g2b
3 a b c en y0 y1 y2 y3 y4 y5 y6 y7 h a b c en y0 y1 y2 y3 y4 y5 y6 y7 a b c en y0 y1 y2 y3 y4 y5 y6 y7 a b c en y0 y1 y2 y3 y4 y5 y6 y7 y0 y2 y31 expansion to 1-of-32 decoding
4 operational environment 1 notes: 1. logic will not latchup during radiation exposu re within the limits defined in the table. 2. device storage elements are immune to seu affects. absolute maximum ratings note: 1.stresses outside the listed abso lute maximum ratings may cause permanent damage to the device. this is a stress rating only, functional operation of the device at these or any other conditions beyond limits in dicated in the operational s ections is not reco mmended. exposure to absolute maxi mum rating conditions for extended periods may affect device reliability. 2. per mil-std-883, method 1012.1, section 3.4.1, p d = (t j(max) - t c(max) ) / ? jc recommended operating conditions parameter limit units total dose 1.0e6 rads(si) seu threshold 2 108 mev-cm 2 /mg sel threshold 120 mev-cm 2 /mg neutron fluence 1.0e14 n/cm 2 symbol parameter limit units v dd supply voltage -0.3 to 7.0 v v i/o voltage any pin -.3 to v dd +.3 v t stg storage temperature range -65 to +150 ? c t j maximum junction temperature +175 ? c t ls lead temperature (soldering 5 seconds) +300 ? c ? jc thermal resistance junction to case 15.0 ? c/w i i dc input current ? 10 ma p d 2 maximum power dissipation permitted @ tc=125 o c 3.3 w symbol parameter limit units v dd supply voltage 3.0 to 5.5 v v in input voltage any pin 0 to v dd v t c temperature range -55 to + 125 ? c
5 dc electrical characteristics (pre and post-radiation)* (v dd = 3.0v to 5.5v; v ss = 0v 6 , -55 ? c < t c < +125 ? c) ; unless otherwise noted, tc is pe r the temperature range ordered symbol description condition min max unit v il low-level input voltage 1 v dd from 3.0v to 5.5v 0.3 v dd v v ih high-level input voltage 1 v dd from 3.0v to 5.5v 0.7 v dd v i in input leakage current v in = v dd or v ss -1 1 ? a v ol low-level output voltage 3 i ol = 100 ? a v dd from 3.0v to 5.5v 0.25 v v oh high-level output voltage 3 i oh = -100 ? a v dd from 3.0v to 5.5v v dd -0.25 v i os1 short-circuit output current 2 ,4 v o = v dd and v ss v dd from 4.5v to 5.5v -200 200 ma i os2 short-circuit output current 2 ,4 v o = v dd and v ss v dd from 3.0v to 3.6v -100 100 ma i ol1 low level output current 8 (sink) v in = v dd or v ss v ol = 0.4v v dd from 4.5v to 5.5v 8 ma i ol2 low level output current 8 (sink) v in = v dd or v ss v ol = 0.4v v dd from 3.0v to 3.6v 6 ma i oh1 high level output current 8 (source) v in = v dd or v ss v oh = v dd -0.4v v dd from 4.5v to 5.5v -8 ma i oh2 high level output current 8 (source) v in = v dd or v ss v oh = v dd -0.4v v dd from 3.0v to 3.6v -6 ma p total1 power dissipation 7,8 c l = 50pf v dd = 4.5v to 5.5v 1.1 mw/ mhz p total2 power dissipation 7,8 c l = 50pf v dd = 3.0v to 3.6v 0.5 mw/ mhz i ddq quiescent supply current v in = v dd or v ss v dd from 3.6v to 5.5v 10 ? a
6 notes: * for devices procured with a total ionizing dose tolerance guar antee, the post-irrad iation performance is guaranteed at 25c p er mil-std-883 method 1019, condition a up to the maximum tid level procured. 1. functional tests are conducted in accordance with mil-std-883 with th e following input test conditions: v ih = v ih (min) + 20%, - 0%; v il = v il (max) + 0%, - 50%, as specified herein, for ttl, cmos, or schmitt compatible inputs. devices may be tested using any input voltage within the above specified range, but are guaranteed to v ih (min) and v il (max). 2. supplied as a design limit but not guaranteed or tested. 3. per mil-prf-38535, for current density ? 5.0e5 amps/cm 2 , the maximum product of load capac itance (per output buffer) times fre quency should no t exceed 3,765pf/ mhz. 4. not more than one output may be shorted at a time for maximum duration of one second. 5. capacitance measured for initial qualifica tion and when design changes may affect th e value. capacitance is measured between the designated terminal and v ss at frequency of 1mhz and a signal amplitude of 50 mv rms maximum. 6. maximum allowable relative shift equals 50mv. 7. power dissipation specifi ed per switching output. 8. parameter guaranteed by design an d characterization, but is not tested. ac electrical characteristics (pre and post-radiation)* (v dd = 3.0v to 5.5v; v ss = 0v 1 , -55 ? c < t c < +125 ? c); unless otherwise noted, tc is per the temperature range ordered notes: * for devices procured with a total ionizing dose tolerance guar antee, the post-irrad iation performance is guaranteed at 25c p er mil-std-883 method 1019, condition a up to the maximum tid level procured. 1. maximum allowable relative shift equals 50mv. c in input capacitance 5 ? = 1mhz v dd = 0v 15 pf c out output capacitance 5 ? = 1mhz v dd = 0v 15 pf symbol parameter condition v dd minimum maximum unit t plh1 binary select to y n c l = 50pf 3.0v to 3.6v 4 19 ns 4.5v to 5.5v 3 10 t phl1 binary select to y n c l = 50pf 3.0v to 3.6v 4 19 ns 4.5v to 5.5v 3 10 t plh2 enable to output y n c l = 50pf 3.0v to 3.6v 3 19 ns 4.5v to 5.5v 3 10 t phl2 enable to output y n c l = 50pf 3.0v to 3.6v 4 19 ns 4.5v to 5.5v 3 10
packaging figure 1. 16-lead flatpack
UT54ACS138E: smd drawing number: 96544 = UT54ACS138E device type: 02 = 1 rad(si)/sec package type: x = 16-lead ceramic botto m-brazed dual-in-line flatpack lead finish: (notes 1 & 2) a = solder c = gold x = optional 5962 ***** ** * * * * total dose: (notes 3 & 4) r = 1e5 rads(si) f = 3e5 rads(si) g = 5e5 rads(si) h = 1e6 rads(si) 03 = 50 to 300 rads(si)/sec class designator: q = qml class q v = qml class v notes: 1. lead finish (a,c, or x) must be specified. 2. if an ?x? is specified when or dering, part marking will match th e lead finish and will be either ?a? (solder) or ?c? (gold). 3. total dose radiation must be specified when ordering. qml q and qml v not available without radiation hardening. for protot ype inquiries, contact factory. 4. device type 02 is only offered with a tid tolerance guarantee of 3e5 rads(si) or 1e6 rads(si) and is tested in accordance wi th mil-std-883 test method 1019 condition a and section 3.11.2. device type 03 is only offered with a tid tolera nce guarantee of 1e5 rads(si), 3e5 rads(si) , and 5e5 rads(si), and is tested in accordance with mil-std-88 3 test method 1019 condition a.
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